menu "Cell Broadband Engine options"
	depends on PPC_CELL

config SPU_FS
	tristate "SPU file system"
	default m
	depends on PPC_CELL
	select SPU_BASE
	select MEMORY_HOTPLUG
	help
	  The SPU file system is used to access Synergistic Processing
	  Units on machines implementing the Broadband Processor
	  Architecture.

config SPU_BASE
	bool
	default n

config SPUFS_MMAP
	bool
	depends on SPU_FS && SPARSEMEM
	default y

config CBE_RAS
	bool "RAS features for bare metal Cell BE"
	default y

config CBE_THERM
	tristate "CBE thermal support"
	default m
	depends on CBE_RAS

config CBE_CPUFREQ
        tristate "CBE frequency scaling"
        depends on CBE_RAS && CPU_FREQ
        default m
        help
          This adds the cpufreq driver for Cell BE processors.
          For details, take a look at <file:Documentation/cpu-freq/>.
          If you don't have such processor, say N

config CBE_CPUFREQ_PMI
        tristate "CBE frequency scaling using PMI interface"
        depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL
        default n
        help
          Select this, if you want to use the PMI interface
          to switch frequencies. Using PMI, the
          processor will not only be able to run at lower speed,
          but also at lower core voltage.

config CBE_AXON_UTL
	bool "CBE/Axon PCIe Upper Transaction layer error handling"
	default n
	help
	  The Axon chip delivers error conditions detected in the
	  PCIe root complex as interrupts.

config CBE_AXON_PCI
	bool "CBE/Axon PCI error handling"
	default n
	help
	  The Axon chip delivers error conditions detected in the
	  PCI bridge as error interrupts.

endmenu
